die shrink (sometimes optical shrink or process shrink) refers to the scaling of metal–oxide–semiconductor (MOS) devices. The act of shrinking a die creates...

the memory controller into the CPU die. Added important powerful new instructions, SSE4.2. Westmere: 32 nm shrink of the Nehalem microarchitecture with...

In semiconductor manufacturing, the "3 nm" process is the next die shrink after the "5 nm" MOSFET (metal–oxide–semiconductor field-effect transistor) technology...

the "fourth-generation core" successor to the Ivy Bridge (which is a die shrink/tick of the Sandy Bridge microarchitecture). Intel officially announced...

Core processors based on Palm Cove, a 10 nm die shrink of the Kaby Lake microarchitecture. As a die shrink, Palm Cove is a new process in Intel's...

continued its tick-tock model of a microarchitecture change followed by a die shrink until the 6th-generation Core family based on the Skylake microarchitecture...

process is a half-node semiconductor manufacturing process based on a die shrink of the "32 nm" lithography process. It appeared in production in 2010...

Skymont) is Intel's codename for the 10-nanometer die shrink of the Kaby Lake microarchitecture. As a die shrink, Cannon Lake is a new process in Intel's...

soldered contact with the die and IHS (Integrated Heat Spreader), while Intel's subsequent generation Ivy Bridge uses a 22 nm die shrink and a TIM (Thermal Interface...

disturbing Moore's law. The 20-nanometre node is an intermediate half-node die shrink based on the 22-nanometre process. TSMC began mass production of 20 nm...